ECCTD 2003 - CONFERENCE PROGRAM

Sunday, 31st August 2003

Room A Room B Room C Room D Room E Room F Posters
19.00-21.00 WELCOME PARTY

Monday, 1st September 2003

Room A Room B Room C Room D Room E Room F Posters
8.45-9.00 Opening Session
9.00-9.45 Plenary Lecture, Tamas Roska, Akos Zarandy
9.45-10.30 Plenary Lecture, Hoda Abdel-Aty-Zohdy
10.30-10.50 COFFEE BREAK
10.50-12.30 R1 Low Power Design I R2 Numerical Methods R3 Analog Circuits I R4 Nonlinear Systems I R5 CNN Theory R6 Signal Processing
12.30-14.00 LUNCH BREAK
14.00-15.40 R7 Low Power Design II R8 Computational Methods R9 Analog Circuits II R10 Nonlinear Systems II R11 CNN Image Processing I R12 Image Processing P1 Circuits and Systems
15.40-16.00 COFFEE BREAK
16.00-17.40 R13 Switched Capacitor / Switched Current Circuits R14 Multiple Valued Logic R15 Analog Filters I R16 Multidimensional Systems R17 CNN Image Processing II R18 Fast Computation for Signal Processing
18.30-23.00 FOLK PARTY

Tuesday, 2nd September 2003

Room A Room B Room C Room D Room E Room F Posters
9.00-9.45 Invited Lecture, Daniel Foty Invited Lecture, Eric Lindberg
9.45-10.30 Invited Lect., Binkley, Bucher, Kazazis Invited Lecture, Josef A. Nossek
10.30-10.50 COFFEE BREAK
10.50-12.30 R19 VLSI Design I R20 Distributed Systems R21 Analog Filters II R22 Chaos Theory I R23 CNN Vision R24 Video and Multimedia
12.30-14.00 LUNCH BREAK
14.00-15.40 R25 VLSI Design II R26 Power Electronics and Systems I R27 Transconductunce Amplifiers I R28 Chaos Theory II R29 CNN Applications R30 Signal Proc. for Communications I P2 VLSI
15.40-16.00 COFFEE BREAK
16.00-17.40 R31 VLSI Design III R32 Power Electronics and Systems II R33 Transconductunce Amplifiers II R34 General Circuits and Systems R35 CNN Template Design R36 Signal Proc. for Communications II
19.00-21.00 BANQUET

Wednesday, 3rd September 2003

Room A Room B Room C Room D Room E Room F Posters
8.00-9.40 R37 VLSI CAD Tools S1 Nanoelectronic Circuits I S2 Symbolic Circuit Analysis I S3 Chaos Signal Proc. I S4 CNN Dynamics and Wave Computing R38 Digital Filters and Filter Banks I
10.00-12.00 Doctor Honoris Causa Ceremony for Prof. Leon O. Chua, aula of AGH - UST
12.00-14.00 LUNCH BREAK
14.00-15.40 R39 VLSI Modelling S5 Nanoelectronic Circuits II S6 Symbolic Circuit Analysis II S7 Chaos Signal Proc. II R40 CNN Implementations I R41 Digital Filters and Filter Banks II P3 Signal Processing
15.40-16.00 COFFEE BREAK
16.00-17.40 R42 AD Converters R43 Nanoelectronic Circuits S8 Mixed-Signal Vision Systems on a Chip R44 Chaos Communication R45 CNN Implementations II R46 Analog Signal Processing

Thursday, 4th September 2003

Room A Room B Room C Room D Room E Room F Posters
9.00-9.45 Invited Lecture, A. Rodriguez-Vazquez CNN Demo Session
9.45-10.30 Invited Lecture, Yih-Fang Huang CNN Demo Session
10.30-10.50 COFFEE BREAK
10.50-12.30 R47 Analog and Mixed Signals I R48 Circuit Optimization R49 Distortion Analysis R50 Random Number Generators R51 CNN CMOS Implementations R52 Industrial Applications
12.30-14.00 LUNCH BREAK
14.00-15.40 R53 Analog and Mixed Signals II R54 High Frequency Analog Circuits R55 Neural Networks Applications